1. Field of the Invention
The present invention relates to a method for fabricating a capacitor for a semiconductor device, and more particularly, to a method for fabricating capacitors that exhibit both improved electrical properties and sufficient capacitance required for advanced semiconductor devices.
2. Description of the Background Art
Recently, the degree of integration of memory products has been increased through the application of improved semiconductor processing techniques for producing increasingly smaller device structures. Accordingly, the unit cell area has decreased remarkably and the use of lower operating voltages has increased. Despite the decrease in the size of the cell area, however, the capacitance required to operate memory devices without generating soft errors and reducing refresh times has remained on the order of 25 fF per cell. As a result, DRAM capacitor designs using a nitride-oxide (NO) structure as the dielectric film it has typically been necessary to utilize a three-dimensional electrode structure and/or a hemispherical grain surface (HSG) to obtain the necessary capacitance values. The three-dimensional electrode structures increase the effective surface area of the capacitors by increasing the height and vertical surface area of the electrode.
However, increasing the height of the capacitor electrode structures also complicates subsequent process steps, particularly with regard to photolithography and etch processes. As the height of the capacitor increases, the depth of focus and dimension control that can be obtained during subsequent photolithography processes may be insufficient to accurately reproduce the necessary patterns. This difficulty is the result of the height differences between cell regions and peripheral circuit regions, height differences that can adversely affect subsequent integration processes, particularly after interconnection processes and at increased degrees of integration.
It is difficult, therefore, to construct a DRAM capacitor using a conventional NO dielectric film that has sufficient capacitance to support DRAMs designs having 256M or more cells.
In order to overcome some of the disadvantages of the conventional dielectric materials, capacitors using a tantalum oxide film as the dielectric film have been developed. Tantalum oxide films, however, have a non-uniform and unstable stoichiometry that generates vacancy Ta atoms as a result of variations in the composition ratio between tantalum and oxide atoms in the thin film. Thus vacancy Ta atoms in the form of oxygen vacancies are always present in the tantalum oxide film because of its unstable chemical composition.
Although the number of oxygen vacancies within the tantalum oxide film may be varied somewhat depending on the actual composition and the bonding degrees of the incorporated elements, there is presently no technique or method that will completely eliminate the oxygen vacancies. As a result, a special oxidation process intended to more completely oxidize the tantalum atoms in the thin film is required to stabilize the stoichiometry and thereby prevent generating a leakage current. Additionally, the tantalum oxide film is highly reactive with both polysilicon (oxide film electrode) and titanium nitride (metal electrode), two materials commonly used to form the upper and lower electrodes of a capacitor. As a result, oxygen present in the tantalum oxide thin film may react with the electrode materials, thereby forming a low dielectric oxide layer at the interface and degrading the uniformity and electrical properties of the resulting capacitor.
In addition, during the formation of the tantalum oxide thin film, carbon (C), carbon compounds (such as CH4 and C2H4) and water vapor (H2O) are typically produced by the reaction between the organic tantalum source, frequently Ta(OC2H5)5, other reaction gases such as O2 or N2O. These impurities can, in turn, be incorporated into the resulting tantalum oxide film. These impurities, as well as other ions, free radicals, and oxygen vacancies, will tend to increase the leakage current and degrade the dielectric properties of the resulting capacitor.
Accordingly, a primary object of the present invention is to provide a method for fabricating a semiconductor device that incorporates a dielectric film having excellent electrical properties.
Another object of the present invention is to provide a method for fabricating a capacitor for a semiconductor device that has sufficient capacitance for the operation of the high integration semiconductor device, by using a dielectric film having a high dielectric constant.
Still another object of the present invention is to provide a method for fabricating a capacitor for a semiconductor device that can reduce production costs by both decreasing the number of necessary unit process steps and reducing the overall unit processing time.
In order to achieve the above-described objects, the present invention provides a method for fabricating a capacitor for a semiconductor device comprising the steps of: forming a lower electrode at the upper portion of a semiconductor substrate where a predetermined structure has been formed; forming an amorphous (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x film on the lower electrode; and forming an upper electrode on the amorphous (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x film.
There is also provided a method for fabricating a capacitor for a semiconductor device, comprising the steps of: forming a lower electrode at the upper portion of a semiconductor substrate where a predetermined structure has been formed; forming an amorphous (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x film on the lower electrode; performing a thermal treatment on the amorphous (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x film; and forming an upper electrode on the amorphous (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x film.
In addition, there is provided a method for fabricating a capacitor for a semiconductor device, comprising the steps of: forming a lower electrode at the upper portion of a semiconductor substrate where a predetermined structure has been formed; forming a (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x dielectric film on the lower electrode; performing a thermal treatment on the (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x dielectric film; and forming an upper electrode on the (Ta2O5)1xe2x88x92xxe2x80x94(TiO2)x dielectric film.
The present invention will become better understood in light of the following detailed description and the accompanying figures. The figures are provided by way of illustration only and are not intended to limit the scope of the invention.